The
DefSim chip was designed in AMS 0.8µm
CMOS (double-metal, double-poly) technology.
Prototype chips were manufactured via TIMA-CMP
Multi-Project Wafer service. The chip occupies
19.90 mm2 of silicon. It is composed of approx.
48000 transistors, uses 62 pins, and is packaged
in JLCC68 package.
For
more information about DefSim Server and DefSim
Personal visit
www.testonica.com
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